Toolset for advanced serialization and iteration

Discussion in 'Building With Reaktor' started by stephan_schmitt, Jul 11, 2011.

  1. Quietschboy

    Quietschboy NI Product Owner

    What the....., what did i begun? :confused:
    Shure, the core cell borders produce much workload. Unfortunately i found an init bug in my first version, that i had to fix with an additional merger before the Compare Module´s A Input. With that, it is a completly different story. Further i only checked with the trigger clock at sample rate and an event rate of half sample rate. If the ratio between them changes to a much smaller payload (lower event frequency to clock frequency) Max´s Smart Value Macro is definetly the multiple winner. My version gets to the top, if the event rate is something around a fithteenth or more of the clock rate (i.e. evt=3000Hz / clk=44100Hz or evt=26Hz / clk=400Hz).
    Another thing that happened is the bizzare behaviour of Reaktor with unconnected inports. These do not behave like a Zero Constant in every case. I.E. if such an empty inport is connected to the trigger inport of the Value Module, than there is no re-init event (at switch reset). In opposition to a core cell!
    So, +1 for Max

    If you don´t want to "global enable eventloops", than use mine (1.1) :D

    No, not really ;)

    The best working version is 1.1 (for those who are interested, nethertheless)
    see attachment

    PS: For such considerations it would be much easier if we would know the CPU cycles for the basic Modules, Core Cell conversions included. Then we would only need to count....

    Attached Files:

    Last edited: Jan 10, 2015
  2. alfonso santimone

    alfonso santimone NI Product Owner

    Hi herw!
    is this series available in english?
    the link points to a user/password request.
    many thanks!
  3. herw

    herw NI Product Owner

    the link is old, try this:
    i have changed the link in old post too

    I don't have time to translate to English, sorry; but i think it is simple to translate

    ciao herw
  4. alfonso santimone

    alfonso santimone NI Product Owner

  5. MvKeinen

    MvKeinen NI Product Owner

    Is there any way to trigger an iteration with an event produced by an upstream iterator without using the nested iteration system?

    like so:


    I'd like the 2nd iteration to start after the first spits out $=1. the macro "only $=1" leaves only the event through which carries the value of 1

    I know that for an iteration to occur we need a primary event to trigger it. But is there a core iterator version which interrupts the event stream of the first one, performs its iteration and then lets the first one finish its job? I think I had it years ago but can't find the structure anymore.

    thanks in advance
  6. MvKeinen

    MvKeinen NI Product Owner

    I now got it to work kind of.

    I didn't want to use the nested interation subsystem because the 2nd iterator would be in a different part of the structure. I thought I would need to set all of this structure to "non-solid" then. It didn't occur to me that for the nested iteration to work only those core iterators would have to be "non-solid" that have a nested iteration below them. Also I didn't know that we can setup an iterator chain inside the { }} bus.

    this structure would work but I'd really love to have another solution. so any help would be great!